1. Field of the Invention
The present invention relates to a semiconductor integrated circuit device, and more particularly but not by way of limitation, to a semiconductor integrated circuit device including a bridge circuit configured to output an integrated control signal in synchronization with a frequency-divided clock signal, and a method of performing the same.
2. Description of the Related Art
Semiconductor integrated circuit (IC) devices usually include a central processing unit (CPU) and multiple peripheral circuits. The CPU and the peripheral circuits typically operate at different operating frequencies. Accordingly, the semiconductor integrated circuit devices include a main bus, e.g., an advanced high-performance bus (AHB), to which elements operating at a fast operating frequency are connected, and a peripheral bus, e.g., an advanced peripheral bus (APB), to which elements operating at a slow operating frequency are connected.
Generally, the CPU, a bus master, and a memory device, which are essential to a semiconductor integrated circuit device, are connected to the main bus. A universal asynchronous receiver/transmitter (UART), a timer, and an analog-to-digital converter (ADC) are selectively connected to the peripheral bus according to the usage of the semiconductor integrated circuit device.
The peripheral circuits receive a main clock signal used in the CPU, divide it according to their operating frequencies, and synchronize control signals output from the CPU with the frequency-divided clock signals. Accordingly, as the number of peripheral circuits increases, control signals for controlling the peripheral circuits become increasingly diverse and complicated. In addition, when the peripheral circuits are reused in a different system, they need to be modified so as to generate a clock signal required by the system. As a result, reusability of the peripheral circuits may be decreased.
Therefore, a method of integrating control signals for multiple peripheral circuits is desired.